Apr — Jun 2025
D-PALI 3D
Extended the D-PALI gripper into full 3D manipulation, redesigning its linkage and finger bases before training TD3 policies in MuJoCo to move and orient a cube.
- Python
- RL
- Hardware
Imperial College London — MEng EIE — 1st
Maximilian Adam
Researching verifiable, post-quantum systems. Woking on building the future of secure agents.
- Focus
- Verifiable computation & agents
- Thesis
- HAWK · E8 lattice
- Status
- Joining · Outerlimit
E8 root system · 240 roots · 8 rings of 30
§01
About
Hi, I'm Max.
I have recently completed my MEng in Electronic & Information Engineering at Imperial College London, achieving a First and 86.3% for my final thesis. I focus on cryptography, secure and verifiable computation in particular. That focus came out of an internship at Veriphi Labs, working on verifiable constraints for AI agents: how to enforce simple allowed/forbidden checks when the underlying evidence is distributed across multiple parties and must stay private.
I'm currently preparing to join outerlimit having written my master's thesis on post-quantum signatures, instantiating HAWK with the remarkable lattice E8 to achieve faster sampling while maintaining strong security.
Away from academia I play the piano (currently learning Rachmaninoff's Élégie in E-flat minor, Op. 3 No. 1), and I boulder and box. I love the mental flexibility both demand.
§02
Research
Improved signatures from instantiating HAWK with a remarkable lattice
Master's thesis
HAWK is a leading post-quantum signature scheme whose signing cost is dominated by discrete Gaussian sampling over structured lattice cosets. My thesis asks whether E8, the exceptionally symmetric eight-dimensional lattice rendered above, can make that sampling faster without breaking HAWK's signing and verification interface.
It turns out this is a scheme design problem, not a drop in sampler swap. The result is HAWK-E8-CM: a coset matched HAWK variant with a modified public quadratic form, backed by a proof of concept implementation.
- Identified a congruence defined ℤ[ζ₈] module as a scaled copy of E8, with an explicit module basis
- Embedded it into HAWK's cyclotomic ring as repeated blocks, underlying lattice (2E8)⊕n/4
- Showed HAWK's coefficient wise mod-2 interface loses the E8 coset structure, and built the internal coset matching interface that fixes it
- Implemented and benchmarked a blockwise, parallel E8 sampler inside the full signing and verification path
The lattice in question
Median sampler speedup vs HAWK
n = 2564.32×
n = 5125.31×
n = 10247.12×
Standalone sampler benchmarks, HAWK-E8-CM prototype.
Themes
- Post-quantum cryptography
- Verifiable computation
§03
Experience
Field log
-
Aug 2025 — Sep 2025
Research Intern
Veriphi Labs · London
Fully homomorphic encryption for multi party computation (MPC).
-
Aug 2024 — Sep 2024
Simulation / Data Analyst Intern
Nova Systems International · Farnborough
Simulated complex conflict scenarios and decision pipelines; built GPS and satellite simulations in Lua and C++.
-
Aug 2023 — Sep 2023
Machine Learning Intern
Tekever · Southampton
Improved drone view people detection F1 by 15% via domain adaptation; strengthened model robustness through data cleaning and visualisation.
-
Jun 2023 — Jul 2023
Data Analyst Intern
Williams Grand Prix Engineering · Grove
Built a wind tunnel data visualisation tool across key aero metrics; streamed car simulation data into Excel in real time; co-developed a manufacturing pipeline platform.
§04
Projects
Built & shipped
Apr — Jun 2024
Balance Robot
Built a two wheeled self balancing robot with cascaded PID control, Raspberry Pi vision, autonomous target following, and a Flask interface for telemetry and manual control.
- C++
- Python
- Hardware
Feb — Mar 2024
Caleidos C Compiler
Created a C90 to RISC-V compiler supporting arrays, control flow, function calls and recursion, pointers, strings, structures, and a broad range of integer operations.
- C++
- RISC-V
Feb — Mar 2024
Accelither
Developed a multiplayer slither.io style game controlled by custom FPGA hardware, using Pygame, TCP and Protobuf networking, Nios II, and DynamoDB.
- Python
- SystemVerilog
- Networks
Nov — Dec 2023
RISC-V CPU
Developed an RV32I-compliant CPU in SystemVerilog with caching, pipelining, a robust test suite, and thorough design documentation.
- SystemVerilog
- Hardware
- RISC-V
May — Jun 2023
EEERover – Helionix
Created a three omni wheel rover that detected magnetic, infrared, and radio signals and sent them over TCP for decoding and display, placing first of 33 teams.
- C++
- Hardware
- Networks
Selected competition activity
- IBM Hackathon
- Jane Street Monthly Puzzles
- IC Hack
- Imperial Algothon
- Citadel Correlation One
- Numerai Data Science Tournament
§05
Capabilities
Instrumentation
Languages
- Python
- C++
- Lua
- SQL
- SystemVerilog
Machine learning
- Statistical modelling
- PyTorch
- TensorFlow
- Scikit-learn
Cryptography
- Coding theory
- Post-quantum signatures
- FHE · MPC
- Verifiable computation
Systems & hardware
- C++ systems programming
- RISC-V · Verilog
- Simulation & modelling
Data
- Visualisation & analytics
- SQL & data engineering
- Pandas · NumPy
- FiftyOne
§06
Education
Training data
Oct 2022 — May 2026
MEng Electronic & Information Engineering
Imperial College London
Achieved First Class Honours
Relevant modules
- Cryptography & Coding Theory
- Deep Learning
- Statistical Signal Processing
July 2022
A Levels
Highgate School
President of Engineering Society.
- Further Mathematics A*
- Physics A*
- Chemistry A*
- Mathematics A*
§07
Contact
Open a channel
Joining outerlimit to pursue the future of agentic security. If you'd like to talk research, random ideas or collaboration, my inbox is open.
MaximilianJAdam@outlook.com